Modding the DirectStream DAC MKI

Tho your milage may vary:

There is a theoretical reason for adding more capacitance in parallel with C6 and C7. They aren’t across the power supply; they are across the bottom of the R5 and R6 voltage divider which goes to the VCOM input of the opamps. VCOM sets the output common mode voltage, i.e. the ground reference for the outputs. When I build the DS prototypes I used the AD8139’s which have a very high input impedance for VCOM. I didn’t notice that the VCOM input on the AD8132’s that I used on the DS had a much lower input impedance, i.e. the ground reference is noisy.

When we listened to the DS we ended up choosing thick film resistors for R5 and R6. With the newer software on the DS, I strongly suspect that using better thin film resistors for R5 and R6 would help sound quality and that doing something to stabilize their output better over the audio frequency range (e.g. some good caps) could help sound quality.

FWIW all of the R5 and R6 resistor dividers (and their caps) are in parallel.

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Also, I should have said, changing R5 and R6 to 1.00k Ohms instead of the 10.0k that the schematic indicates is a good idea. (I don’t remember what the production boards are using.)

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Thanks Ted!

Turbo

Oh yeah the VCom caps make a difference. I still think ultimately designing out the transformer would be a good thing. Its a LimFac on analog performance.

On my DS board, R5 and R6 have 499 ohms.

Now that you mention it that sounds like the value we settled on.

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Hi Ted,
thank you for all the advice. You encouraged me to check the effectiveness of the Vocm modification.
220 uF capacitors stabilizing the general power supply of ADS8132 amplifiers to some extent already implement this mod, but I will check it in detail next weekend.

Since my English is poor (I use a dictionary) I use simple language and I am afraid that I cannot express the respect you deserve, for always helping us and explaining all matters with great understanding and respect.

I feel a strong bond with PS Audio, so I dare to convey my doubts and suggestions.
The Nichcon UKZ capacitors used by me introduced such a huge improvement in the sound quality that I have doubts (to be honest there are no doubts) whether smd electrolytic capacitors should still be so widely used in new projects. Installation of UKZ capacitors is the cheapest and simplest modification, giving an effect much greater than the replacement of output transformers.

The output buffers also make a big difference, although their effectiveness may depend on the individual installation. I don’t have a preamplifier, DSD drives active loudspeakers directly. However, I would like to point out that the signal is transmitted using the best Van den Hul cables, The Platinum Hybrid XLR.
Regards
Wiesiek

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Well tonight’s the night we try the “OA as bit buffer into passive LPF” trial :smiley: On another OA pair, also cut loose from the output nets and wired direct to transformer.

Just finished soldering and am putting it back together now. Yes its challenging to solder SMD with through hole technology :wink: We’ll see how it goes… :thinking:

Update- we have music, thankfully :slight_smile: Now to see how it sounds

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I will be doing this as soon as I take delivery of the MKII.

Keep up the great work. Fantastic!

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Then you can post the instructions here, so I know how to learn to do it myself too.

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Apologies in advance for the long winded reply here but there’s a lot to cover. Those not interested skip over now.

Well I have to declare, “mission accomplished” (thank G-d). It did lift the relative blanket off the sound. The sound is much more live(ly) now. Just what we were after here. Bravo! Now we can hear more clearly how well the rendering is going, and its rendering bee-yoo-tee-ful as well. No other way to put it. Trumpets sound particularly amazing. Vocals as well.

Think we’ll call it the “blanket lift” mod. Based on my experiments, think can conclude:
a) The MFB topology hampers the rendering output of the DS. My guess is, the step response is involved. Whatever it is, it got much better sonically when changed to plain old topology.
b) the OA as closed loop LPF does give a higher noise floor that impacts clarity and liveliness. The “blanket” source if you will.

By all means- YMMV on the above conclusions :wink:

So for this we left the OA factory front end R’s, but the filter C between them is now much smaller. We removed the feedback C and have a larger feedback R connected to remove the MFB). Now the OA deliverers buffered digital bitstream basically to the passive LPF on the output.

On the output we have a simple RC RC cascade using tantalum SMD R and PPS SMD C. Since it’s just a first order cascade it has perfect step response. Simple, doable. The output impedance is also ~ similar (enough IMO) to what was there before. Not saying this is the ultimate output filter, just what we have for now and working with what we have. But based on the sound I feel no need to mess with it so far. We then wire that direct to the transformer.

So we’ll take the other pair of OA and convert to this topology as well. Then we’ll have 2 OA per channel as Ted suggested we need due to the fw algorithm.

But think I’ll then let each OA +/- drive a separate primary coil (there are 2 in parallel now in this transformer). That should be interesting as well.

We will also see about trying output caps again as well. Need to compare. Ultimately what we could do is no caps, no transformer iff we set it up for bi-polar PSU to the OA. Maybe we’ll create new modules and do just that. We’ll see how caps sound vs transformer first and go from there.

BTW the tinfoil hat slipped off for a moment and I bought 2 pr of Bybee Cu bullets. I’m thinking we’ll try them soon as well to connect the transformer outputs to the XLR. We’ll see I guess; either it works audibly or it doesn’t. Re: the slipped hat, as I said the other DAC drove a foundational level shift in thinking about all this. Ultimately that’s a good thing I guess and its already providing some large benefits…

I feel the experimental DAC is about ready to go on local high end tour. I’m excited and the gang will be impressed, no doubt. One also has a massively bi-amped, very transparent, best cables, etc, same speakers I have that is going to absolutely blow us away I think… He also has heard the other DAC (in fact he brought it over here) so knows what it’s up against.

Turbo

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This much wasn’t even in the Simpsons :face_with_monocle:

I was surprised to see the photo.
“Wonder, is the ballroom music played with ds on the titanic?”

Yeah well its just experimental… And we’re forced to work with existing structure. Thus its not a beautiful picture. Some will get it, some won’t. Those who won’t will rather complain about that, rather than be interested in sonics.

Turbo

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Incredible stuff T!

It’s a lot of work, thanks :slight_smile: Looking with the scope the output filtering isn’t tuned/working properly yet, and the bit buffer could use more roll off filtering. The bit amplitude is higher than I expected as well. We’ll need a better simulation model. Hmm.

We’re also going to have to isolate the digital from the analog better (shielding between them, perhaps).

Turbo

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Ted do you have an image that shows the +/- bits driving into the OA? Don’t think I get yet exactly how that is driven and am having trouble getting that modeled.

Thanks, Turbo

If you are talking about Spice models of the outputs of the reclocker then On Semi’s ap note AN1503, perhaps there’s a good IBIS file out there too. If you are talking about the signals, then (depending on the FPGA software release) either 11.2896 or 22.5792MHz differential pulse signals with approx 0.5ns rise and fall times between 1.6 and 2.4 volts.

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Thanks Ted, I’ll have a look at the app note and such.

Do you happen to have a capture of what a few bits of the actual bit clocker input to OA circuit looks like at the In+ and In- at the same time? I’m interested in the +/- input relationship in time.

Are they simply the anti one another? In my model I have a pulse source that just floats between the 2 inputs. I know that’s not how its actually being done but is that sufficient to drive my model? With the scope I see about 0.75v amplitude on the bits at the input.

Thanks, Turbo

It’s simply a differential signal - one goes up when the other is coming down. I don’t have a scope fast enough to show the real wave forms. Here’s a version I have lying around taken from the FPGA output (i.e. CMOS with the wrong voltages and slew rates) but showing a couple of 2 bit long pulses and then two one bit long pulse. This is with the bandwidth of the scope at 125 megasamples / sec. so I could capture 50msec. The Yellow is the clock.

Here’s a simulation, the overshoot on the initial edges is an artifact:

A zoom in of a transition, once again the overshoot on the transition is an artifact:

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