In theory I2S is better than S/PDIF or AES/EBU (AES3) because it separates the clock and the data onto separate signals (as well as using balanced connections over the HDMI cable.) S/PDIF (etc.) use one wire for both the clock and data and hence they need to be separated on the receiving end. On the other hand I2S was designed for point to point within a case, not between cases and is more general than most people implement so there’s always a chance that two non-complete implementation don’t talk well to each other.
The separation of clock and data is important when you use a PLL (of FLL) with S/PDIF, etc. to recover the clock and separate the data. That recovered clock is subject to jitter because of the very design of the protocol and it takes a lot of work to get the PLL to no be confused by signals going up or down at the key points, there are only a few spots in the protocol that should always have aligned transitions so looking at just those will lower jitter somewhat… The DS doesn’t care about that at all (it doesn’t track the incoming clocks for either I2S or S/PDIF, etc. and doesn’t use a PLL or FLL) so in the case of the DS what really seems to matter the most is the solidity of the ground and how well the cable is shielded.