Do we have measurements on this? It would be good if we did.
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I was wondering as I saw no reference to 100lb.
Thanks!
Appreciate yours and others input. Certainly have been very happy with the DS Mk1.
But I have learned over the decades of different gear- you do not know what you are not hearing or experiencing until you do.
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I do not have any measurement device, and the conclusion was from listening experience. I remember Ted may have provided some charts to reflect the fact in the past (seen too many charts so I am not 100% about this either).
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This is all I could find on the new MKII.
| Analog Audio Output | |
|---|---|
| Connector | RCA single ended or balanced, XLR balanced |
| Output level high, maximum | 4 VRMS Balanced |
| 2 VRMS Single Ended | |
| Output Impedance | <100ā¦/<200ā¦ |
| Frequency Response | 20-20KHz +/- 0.25dB |
| THD+N @ 1KHz (full scale) | <0.1% |
| Output Stage | Passive audio transformer, fed by high current, high speed analog amps producing double rate DSD |
| #### Data Handling | |
| Format | PCM or DSD |
| Sample rate (PCM) | 44.1kHz, 48.0kHz, 88.2kHz, 96.0kHz, 176.4kHz, 192kHz, 352.8kHz; 705.6kHz |
| Word length (PCM) | 16b, 18b, 20b, 24b |
| Data rate (DSD) | Standard (2.8MHz) or Double (5.6MHz) DoP as well as raw DSD on I2S and USB inputs |
| Input jitter reduction | effectively 100%, residual immeasurable. No input PLLs, FLLs. |
| Input Processing | 225.792MHz |
| Signal Processing | 56.448MHz |
| Synchronous Upsampling, all inputs | 56.448MHz for 48k, 96k or 192k; 11.2896MHz for all others |
| Digital Processing S/N ratio | Upsampling > 210dB, volume control and Sigma Delta Modulator: > 330dB |
| Digital Volume Control | Zero loss of precision |
| Analog Conversion method | low pass filter DSD256 (quad rate DSD: single bit DSD at 11.2896MHz) |
| #### I2S Digital Input | |
| Connector | HDMI |
| Format | PCM or DSD. DoP on all inputs as well as raw DSD on I2S inputs |
| #### USB Digital Input | |
| Connector | USB āBā Type |
| Format | PCM, DoP v1.1 (DSD over PCM), or Native DSD |
| Transfer mode | Asynchronous |
I think that <0.1% distortion is because of the transformer as our DS is now .01% or less with the nickel core.
The noise floor never bothered me on the modded DS. I donāt think it would on the MKII ether.
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I donāt have current measurements (Iām still running the first beta unit with no mods which has the noisy attenuators still in the circuit.) The digital noise floor is much lower: The Mk IIās upsampling filters have 61 bits of dynamic range (vs. the DSās 48) and the SDM has 72 bits of dynamic range (vs. the DSās 56 bits).
The analog noise floor when muted is -135dBFS at DC and falls to about -150dBFS at 400Hz and stays there (Iām not sure I believe these numbers, but itās what I measured 11/2011.)
The analog noise floor is noticeably higher when the bits are changing wildly, but itās still (very roughly) at least 20dB down from the DS. I say very roughly because I donāt have the current hardware on my desk to measure alongside the DS. But the Mk II without the 20dB attenuator is quieter than the DS using the 20dB attenuator.
Part of this is expected since the AD8139 is noticeably better than the AD8132 and the LT3045 regulators have better PSRR over the audio band and still have a good PSRR at the DSD256 rate.
But to the ears thereās no contest between the DS and the Mk II on noise floor - itās not subtle. A modded DS canāt get as quiet as the Mk II, there are just too many analog bottlenecks let alone the DS FPGAās digital DSP limits.
[Edit: To be clear a better output transformer should lower the THD some, but Iāll also be lowering it in the next couple of software releases.]
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I would say get oneā¦ If you donāt think itās worth the upgrade then return it.
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Thatās impressive.
The DSās voltage reference (on the inner planes) is down around -140dBFS, but many things dilute that in the hardware,
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Comparing this overview with whatās on the product web page, leads me to ask: whatās the difference between sample rates (quad rate dsd) and data handling (double rate dsd)?
Probably @tedsmith will likely be the right person to ask. Would you kindly respond, please?
OK Tedā¦ Now you put me on the fence again.
Scratching my headā¦ If I get a MKII maybe we could design a transformer specifically for it. 
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The original DS could only do DSD128 (and internally upsampled everything to 10 x the DSD sample rate and then to DSD128.) Later the software was upgraded to do itās processing at DSD256 (and upsample everything to 20 x the DSD sample rate.) The Mk II also upsamples everything to DSD256. The I2S inputs for both can handle DSD256. The USB in the DS could only do DSD128 and the Mk II USB handles DSD256.
Is this what you were looking for?
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Thanks for your quick reply!
Although insightful, I was referring to the specs of the MK2. Itās mentioning two (related?) categories with two different highest rates, as mentioned in previous post. That doesnāt quite make sense to me, as youāre explaining the Mk2 is doing is magic at quad rate dsd.
The final DS software and the Mk II software both upsample PCM to 30 bits at the DSD256 sample rate (with different paths, but that doesnāt matter), then they apply a 20 bit volume and keep all 50 bits, then finally they use a sigma delta modulator to narrow those 50 bits down to one bit (at the DSD256 sample rate.)
The maximum sample rates supported on the digital inputs differs a little with the Mk II, the most noticeable difference is that the Mk II handles DSD256 over USB and the Mk I doesnāt.
Perhaps you are referring to the āSynchronous Upsampling: all inputs upsample to 56.448MHz for 48k, 96k or 192k; and 11.2896MHz for all others.ā 11.2896MHz is the DSD256 sample rate. 44.1kHz, 88.2kHz, ā¦ can all go directly to 11.2896MHz with a small integer upsampling. 48kHzā¦ need to go up by weirder numbers (1176 for 48k, 294 for 192k). The least common multiple of 48kHz and 11.2896MHz is 56.448MHz so thatās where the number in the specs comes from. In reality the Mk II upsamples and downsamples the 48kHz related sample rate in multiple steps to keep the numbers small and the math cleaner. 48k, 96k and 192k to 768k, then down by 2 to 384k, then up by 21 to 8.064Mhz, then down by 5 to 1.6128MHz then up by 7 to 11.2896MHz. The intermediate samples between steps in the upsampling are all 28bits and because each intermediate sample rate keeps all of the information from the original 48, 96 or 192k input, they can be reversed with no loss of information.
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I remember you having explained that before. Good math and happy that data integrity is being maintained!
What Iām referring to might be a typo (under Data Handling/Data rate (DSD)):
āData Handlingā is a slight misnomer here. Itās really describing the input formats (vs sample rates) that are handled. With DSD there are usually two formats Native DSD (e.g. 1 bit per sample at a 2.8224MHz sample rate) and DoP which is a packet of 16 samples wrapped in PCM at 16th of the above sample rate (176.4k for DSD64)
Iād swear that the āData Rate (DSD)ā line also had DSD256 listed in the past.
Perhaps confusingly the next āSample Ratesā section re-enumerates the rates but with specific details about what each separate digital input can handle.
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We call you āChief digital dudeā for a reason.
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