There are two views of the changes in the DS Mk II, goals and technological answers.
The first goal we’ll talk about is lowering noise from the digital inputs. Lowering noise was the majority of the work on each DS mountain top. A blacker background has many benefits: more low-level detail, which can bring out the ambiance of the recording making it more real, it can let you hear more nuance in performances (like seeing the singer’s mouth shapes, perhaps that’s only because I’m a singer ) Lower noise helps the rest of your system to disappear and let the performance be center stage.
The DS did a reasonably good job dealing with jitter, it was very insensitive to incoming input jitter. But there were two places that it fell short of really showing that off: ground loops and FPGA induced noise.
We’ll talk about ground loop treatments today.
Since the digital inputs were not galvanically isolated ground loops could add noise of varying types depending on the source and how it was connected. The amount of noise ground loops pick up is proportional to the loop area and if the loop included units being plugged into different outlets, that loop could be huge. It was also likely that there would be a computer somewhere in the system which would also make a groundloop, but probably more often they contribute gobs of electrical noise.
The Mk II addresses much of this with (defeatable) galvanic isolation on all inputs and outputs. But not all galvanic isolation is created equal. Most of the single chip isolators either run slowly (e.g. optical based) or are intended for isolation of large voltages in industrial type applications. Those isolators’ main goal is to provide a safe logic connection across, say, a 3000V or 5000V barrier. These isolators expect to be used in noisy applications and so any additional noise they create isn’t a problem if it doesn’t interfere the logical signals it’s passing. There are capacitive and transformer-based barriers which require a high frequency signal being turned on and off to represent 0s and 1s. Adding a high frequency signal that’s correlated with the input signals is about the last thing a DAC or ADC needs.
If you look at the datasheets for some of these isolators they have to have a section on how to meet FCC regulations, i.e. how to mitigate the noise they produce. We can’t have that being a problem. There are some isolators that don’t use capacitance or inductance to isolate the signals and also don’t need to use a high frequency burst of energy to represent a transition or a 0 or 1, etc. The problem with them is that they cost a heck of a lot more than the cheap $1 or $2 capacitance based isolators. A quality four channel IC used to be approx $3 to $4 in quantities of, say 1000. Prices have more than doubled in the last couple of years, now they run $6 to $11 in 1000 quantities depending on additional features and packaging. Loosely speaking we need one per each I2S input, three for USB, and three to talk between the digital and the analog card. This is a cost I’d like to avoid, but good isolation is important.
Isolating TOSLink is free
Isolating AES3 and S/PDIF is reasonably cheap, they are speced to be isolated and you can buy quality pulse transformers that do that task well.
Isolating I2S and USB takes a little more work. They need active components “outside” the isolation barrier. In the case of I2S it’s basically a simple LVDS receiver - a chip that receives the differential pairs from the HDMI cable and converts the signals to standard logic signals. We also support providing 100mA of 5V to the I2S device so we’ll need to do that too.
USB is a little more complicated - one approach is to isolate the four USB wires: Data+, Data-, VBUS and ground - but this isn’t easy, the VBUS line both provides power but it also signals things like a new connection, whether a device is a USB Hub or an endpoint device, etc. And it signals this in strange analog ways, not with a simple digital protocol. In the past the chips that supported this only supported USB 1, then the better ones supported USB 2, but not USB Audio, they couldn’t be relied upon to pass the data thru in a timely manner. There are now a few (not cheap) single chip solutions on the horizon, but we’re not waiting for them and the below solution is actually quieter and cleaner.
The interface between USB and the FPGA is I2S, so we can “simply” do what we do for I2S and put the USB transceiver chip and support on the “power island”. Then we only need to provide 5V along with the I2S across the isolation barrier.
If you look at isolated 5V to 5V supplies, they mostly have one thing in common: they are switch mode power supplies What’s worse most of them rely on a transformer with high frequency signals which would generate noise across the isolation barrier. In the DS Mk II we use a high frequency edge controlled differential signal across two caps for the isolation and on the other side we have a small traditional linear power supply: a bridge rectifier and filtering. That can be a much quieter path. There are some gotchas, like using diodes for a bridge on a 5V power supply really lowers the voltage: say about 1.4 volts. So instead I use a MOSFET H-Bridge as a rectifier bridge: with MOSFETs you can have a lot lower voltage and they can switch cleaner than a diode.
Here’s the isolation for S/PDIF and the two AES3 inputs:
Here are the isolation islands for USB and the two I2S inputs:
The white chips with three legs are optically controlled switches to implement the ground lifts.
The board pictures I’ve shown above are the ones I’m using for development, but they have cheaper but noisier isolated 5V to 5V supplies. The current Mk II boards are designed with the supplies I described above and here is a picture of them on the TSS:
You can see the input caps and the high frequency edge controlled driver on the right side. Near the middle are the caps crossing the isolation barrier, then the MOSFET bridge some high frequency bypass caps and then the more traditional SP-Cap to provide power to the USB or I2S input circuitry.
When you look at the whole digital board:
Basically, the bottom 1/3 of the board is mostly galvanic isolation surrounding a few chips