Kudos to miracle worker Ted, Paul, Aaron, and the rest of the team. Didn’t think there could be that much of a sound upgrade from the Massive beta version, but there really is. Even better soundstage, depth, and attack. Two of my go to albums for listening to any new changes in my system are SACDs of Dire Straits/Brothers in Arms (Vertigo 20th Anniversary edition) and Michael Hedges/Aerial Boundaries. Both sound even more spectacular than before to my ears.
Only item I noticed that I wonder if could be addressed in a future release is this: When my path is Oppo UDP-205>HDMI converter box>i2s input, music plays fine, even with red dot rather than green, but source bitspeed/depth don’t appear in display. Instead, shows ‘-/-’ in small font. This was the case with early versions of the firmware/fpga for the MKII, but had been resolved with the latest I’d been using (2.6.2 w/ Massive beta). I would get the red dot, as I believe that means it’s not a recognized source to the MKII, however bitspeed/depth would display fine.
You rang? I guess it’s time to come back. I just needed some time with no distractions to get this release out.
Sigma delta modulators can be modeled in many ways, but one is an infinite impulse response filter followed by a quantizer and negative feedback. (None of this really matters for what follows.)
Anyway the IIR filter is the closest digital filter to an analog filter. In fact, it can be derived directly from the LRC parameters of an analog filter. A simple one pole filter makes the kind of sigma delta modulators used to control all manner of PWM devices like drone motors, etc. That one pole filter sigma delta modulator has the benefit of being unconditionally stable.
As you add more poles (sections) to the filter, SDM’s (with all other parameters constant) become more and more unstable. SACD’s were a very tight balance of stability, compression, audio band signal to noise ratios and minimizing sample rate, etc. SACD’s DSD production typically uses a fifth order filter.
In the DS SDM we aren’t as constrained by the sample rate, processing power, etc. so a seventh order filter with a higher sample rate has some benefits like lower ultrasonic noise near the audio band and less low-level distortion in the audio band. Basically, the noise shaping used in the SDM has more room to push the noise in the audio band into the higher frequencies available.
The first release of Massive had a bug introduced at the last moment that led to noise modulation in some not uncommon configurations. I spent a lot of time assuming that there was some change I’d made in the compiler configuration or the FPGA configuration, other bug fixes, etc. It turned out to be a simple bug. Here’s the glitch in the FPGA simulation of a quiet sine wave that finally showed the problem:
I use 3M AB7050HF RF absorber to kill digital noise i have been using two layers on my bacch4mac. I had to peel off a layer. on bacch 4MAC used as a roon endpoint. This tells me the DSMk2 with Massive is quieter . My soundstage increased six feet both sides.
Among other things I worked on a team that built a simulator of C++ that looked for bugs like buffer overflow, unreleased memory, arithmetic overflow…
I also ran a project which suggested words to add to a query to either help narrow the search down or to help find a set of distinct possible meanings (given “IRA” it might suggest “account”, “money”, etc vs. “Irish,”) That was fun because we got to use singular value decomposition to infer word meanings in a text corpus.
I should also publicly say thanks to a small team of beta testers who gave me constructive feedback on many attempts to narrow down and fix issues which came up with the 7th order SDM. The beta testers were quick to try each of my many experiments and potential releases and often gave me good reproduction instructions or recording of failures, etc.
Massive Welcome back. It was a noticeable improvement from the get go. But I felt potential was held back. When i reduced the RF and EMI absorption it just opened up. To a literal amazing degree. The 7th order is the ticket. It is the 7th and 8th veil lifted in my opinion.
I had to bring my wife in to confirm the change was not audiophile expectations. She confirmed. Then i reduced filtering of noise. I guess i should remove all. This is truly the most open recordings i ever witnessed.
I am ready for the TSS upgrade train. A digital disciple. Your work truly never fails to amaze!
Are those 4th and 5th harmonics, and again at 8 and 10, etc? I’ve not yet had the pleasure of listening to a Mk2 so I don’t know what the bug sounded like, but if it’s what it looks like I’m very glad it was something that could be fixed in code.
How different would an analysis of the Mk2 analog output of this same signal look? The “noise floor” in that trace looks astonishing.
The SDM code (currently) has a 76 bit dynamic range. That isn’t the limit you see in the simulation. The code before the SDM sends the SDM a 28 bit input (26 bits of precision with two upper guard digits), so the sine wave input accuracy is the limit you see in the simulation.
The symptom of the bug wasn’t the apparent harmonic distortion so much as that that all of the distortions changed in time and also when the level of the input changed (noise modulation.) But that harmonic distortion was something that I knew wasn’t right so it pointed to where the bug was in the code.
The ear is exquisitely sensitive to modulated noise but very insensitive to white noise. Very low levels of inharmonic distortion or modulated noise is audible for most audiophiles.
Yep, the image is an analysis of purely digital signal so its noise floor can be like the Mariana trench. What I’m curious about is the analog output that a Mk2 would produce from the same SDM bits. How low would it go using the same FFT parameters? And it’s not so much the actual numbers I’d care about as it is the sense of how close (or not) the analog world can track digital ideals.
The bug’s result is “in the noise” in any static analog measurement of a test tone, i.e. I couldn’t directly use a single FFT to look for the bug in the analog domain. (My analog scope is only 16 bits of resolution and can only do up to a million point FFT and taking many such FFTs and averaging them with Excel or Matlab would be tedious at best.). I’d need to use a chirp, sweep or similar and watch for anomalies from one FFT to the next… But I had code that didn’t exhibit the bug, so the bug was in the code (or design), not the analog hardware so attacking the bug in the digital domain seemed much more productive. (The digital domain FFT was an average of about 2000 one million point FFTs.) At one point I was using gate level / timing accurate simulations of the FPGA just in case it was a tools problem, or a timing mistake in my code, etc. Fortunately, I could see something wrong in one of the simulations and also see it in the much faster behavioral simulation of just my Verilog code.
