Or with HQPlayer…
I’ve been telling people that have quadrate files that even if the DS supported quadrate they will still likely be disappointed in the few quadrate sources. Still the Matrix is a fine piece of equipment which I have and can recommend. It does quadrate over I2S both DoP and native DSD as well as 705.6kHz PCM.
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Indeed I remember very well you said this multiple times. So do I understand right that the quadrate feature is something you think is beneficial only in rare cases due to your other remark?
So quadrate is just something techcally possible for folks ignoring your assumption of likely disappointment?
Gotta be honest, I used to think this was a bit marginal in terms of cost/benefit. But I recently was playing around with my system and turned on Roon’s 2x/4x upsampling checkbox for PCM and honestly I’m enjoying the sound more than when I was running bit-perfect. The bass in particular seems to have better definition and power without actually being louder.
So now I’m wondering what the absolute best case for the DSD Mk1 will be with external upsampling and I2S input: max PCM or DSD256.
Hey look, there are worms in this can!
I think that many people want quadrate, but don’t know that their hardware doesn’t support it.
Still plenty of people have streamers or the Matrix, etc. that do support it and more devices are showing up that support it.
Since the internals of the DS FPGA code have been quadrate for a while I thought that it would be trivial to do quadrate I2S input. It might have been trivial if I hadn’t made two confounding bugs which greatly slowed down FPGA compiles and caused most to fail.
Even if quadrate isn’t of interest, the improvement in sound quality brought by implementing it is.
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Sorry that I’m confused… the improvement in sound quality brought by implementing it, but which likely isn’t existing due to your statement that the optimal rate is somewhere between 2x and 4x DSD but not 4x DSD?
Where does it improve sound quality if quadrate makes no sense with the DS on the other hand?
I think I missed something. Where does the quadrate implementation improve sound except for the non-recommended playing of quadrate recordings?
I paid attention to jitter/noise as I implemented quadrate. To implement quadrate I needed another clock for faster input sampling. I chose that clock carefully and kept jitter/noise in mind on every line of code.
A complete rewrite of everything would help too. But that takes time.
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For me, I found that using HQPlayer (Embedded in my case) to upsample all PCM and DSD to DSD128 over I2S via the Matrix SPDIF 2 sounded better than anything else. I am using Roon with an ultraRendu acting as an HQPlayer NAA.
No dig at Ted but I think HQPlayer doing the PCM to DSD conversion sounds better than the DirectStream DAC doing it.
DSD256 will be another step up!
Thanks Ted, I think now I understood:
You realized (quadrate)-accompanying SW improvements within the new firmware for DS and DS Mk II plus you realized some connected HW improvements (clock) (just for the Mk II).
But wait…you needed a new clock for realizing quadrate…but you realized quadrate also for the DS Mk I…? Clock is HW, right?
This is exciting news. Here is what I heard/read: ‘it will sound better’. 
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Not quite.
In the FPGA you can have as many clocks as you want. It has some serious clock generators. You don’t want to use all of that freedom, but I needed input sampling at a higher rate than anything else in the FPGA. I made it run 4/3 as fast as the “main” clock.
If you want gory details:
https://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf
And FWIW this is why you don’t want many clocks:
or
http://www.sunburst-design.com/papers/CummingsSNUG2008Boston_CDC.pdf
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So what’s the new input sampling rate? 4/3 x 169.433MHz = 225.792MHz?
Am I right to think that high rate would only be needed for DSD256 in DoP? Because native DSD256 via I2S is only 11-ish MHz (on two lines) which is in between the baud rate for 192 and 352.8 24-bit PCM on a single I2S line.
Yep, 80FS, and yes for DoP. Someone is paying attention 
.
The real reason for the high clock rate was to make 24/192kHz PCM via, say, AES3 more accurate. Some have had problems with a certain upgrade Bryston did on one of their streamers. It stopped 24/192 from working for them.
To avoid clock synchronization issue and to avoid looking at the edges of the input clocks the DS code simply samples the incoming signal line. To do this reliably you need a clock at just about 4 times the rate of the incoming clock, not too high and not to low. But then you have to know the rate of the incoming clock. To not have to worry about that you can use a clock at least, say, 8 times as fast as the fastest input. There are two issues. The slower the sampling clock the higher the local input jitter (not that big of a deal in the DS.) And you need to know approximately when to notice if a signal transition happened or not. For 192k AES there are 64 bits per sample (stereo 32 bits). The biphase clock is running at twice that rate = 24.576MHz. Four times that is 98.304MHz, but I’d have to wait longer to lock since I’d need to measure the rate and generate 4 times that. Instead running at at least 8 time 24.576MHz allows me to break the clock into 8 parts and then I can distinguish between a transition at about 3/4 of a bit or not. The old sampling clock rate was about 7 times which was too close to the edge.
[Edit: Oh, and another minor advantage, running the clock a little faster helps the rate detector run fast enough to distinguish the faster rates without getting too cute.]
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Thank Ted! All your hard work is much appreciated. I’m looking forward to the new firmware release with much anticipation! With out knowing what the new Mk II DAC will cost a lot of us may be using our current directstream as our digital foundation for the long run!
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Neat.
Sweet. Thanks.
Could you expand on what exactly was the difficulty with Bryston gear? I remember the noise around that issue and never understood what was different about their signal vs everything else that the DS DAC could receive without error. I play 24/192kHz SPDIF all the time via the coax input.
I don’t know what the deal was. They weren’t interested in loaning us a unit, sending scope pictures of the signal difference (since they had the old that worked and the new which didn’t) or other ideas. So when I got a faster clock I took the opportunity to fix the only thing I knew that was questionable about my implementation.
It is unfortunate you did not have more information with which to work.
Interestingly, the Bryston is the only unit with which the DSD has difficulty, the DSD the only unit with which the Bryston has a problem.
Also interesting is 192/24 via USB is fine. Only 192/24 via AES/EBU and S/PDIF is a problem (the USB is not on the same board in the Bryston as these other outputs).
A conspiracy of circumstances.
I hope the new DSD is able to work with the Bryston for those who have experienced this problem.
Matrix prices are increasing, unfortunately.
Is pink faun using pci more logical instead of matrix using usb?
When?